An Efficient VLSI Architecture for Diamond-Search-Pattern-Based Motion Estimation Algorithms

Diamond-search-pattern-based motion estimation algorithms, such as Motion Vector Field Adaptive Search Technique (MVFAST) and Advanced Diamond Zonal Search (ADZS), has been proposed recently to reduce the complexity of the motion estimation. However, there is no efficient hardware implementation for this new class of algorithms. Previously proposed architectures for block-based motion estimation algorithms, such as systolic arrays and tree architectures, are inefficient for the new class of algorithms in terms of memory access patterns. In this paper, an efficient data flow pattern and the corresponding VLSI architecture are proposed for the diamond-search-pattern-based algorithms. The proposed data flow exploits the overlap of reference data among the search points to reduce data memory accesses which are the most power consuming operations. It is efficient in the sense that each required data is only loaded once from the memory. The simulation result shows that the cycle required to process a frame with ADZS is about 1% of that required with full search. In addition to reduction of processing cycles, the proposed data flow scheme reduces the number of memory accesses required by more than 30% in comparison to the straightforward processing of the search points.